Thin polished plates such as silicon wafers and the like are a very important part of modern technology. A wafer, for instance, may refer to a thin slice of semiconductor material used in the fabrication of integrated circuits and other devices. Other examples of thin polished plates may include magnetic disc substrates, gauge blocks and the like. While the technique described here refers mainly to wafers, it is to be understood that the technique also is applicable to other types of polished plates as well. The term wafer and the term thin polished plate may be used interchangeably in the present disclosure.
Fabricating semiconductor devices typically includes processing a substrate such as a semiconductor wafer using a number of semiconductor fabrication processes. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etching, deposition, and ion implantation.
Generally, certain requirements are established for the flatness and thickness uniformity of the wafers. However, the various process steps performed during fabrication may alter stresses in the thin films deposited on the wafers and result in elastic deformation that can cause significant distortions, including in-plane distortions (IPD) and/or out-plane distortions (OPD). Such distortions may lead to errors in downstream processes. For example, distortions may lead to overlay errors in lithographic patterning or the like.
Various control techniques have been developed for handling distortions that may occur during semiconductor fabrication. For example, a chucking device (e.g., a vacuum chuck or an electrostatic chuck) is typically used in a lithography tool to chuck a wafer prior to transferring patterns to the wafer. Chucking the wafer in this manner helps keeping the wafer stationary and also helps reducing out-plane distortions (OPD) of the wafer. Chucking may serve to remove some process-induced in-plane distortions (IPD) as well.
It is noted, however, that forcing a wafer onto a chuck may also cause certain types of distortions. For example, a gap may exist between a wafer and a chuck, resulting in an incomplete chucking of the wafer of which the IPD cannot be correctly estimated unless the flatness information of the chuck is also taken into consideration. In another example, while it is commonly assumed that frictions between a wafer and a chuck have negligible impact on the IPD, cases exist where such frictions do in fact affect the IPD significantly.
Therein lies a need for systems and methods to address distortions induced by chucking, to take into consideration the effects of wafer-chuck interactions, and to control a chucking device in order to optimize its impact.